International Journal of Scientific Research and Engineering Development( International Peer Reviewed Open Access Journal ) ISSN [ Online ] : 2581 - 7175 |
Reversible Implementation of Multiplexer and Demultiplexer Using R-Gates
International Journal of Scientific Research and Engineering Development (IJSRED) |
Published Issue : Volume-3 Issue-4 |
Year of Publication : 2020 |
Unique Identification Number : IJSRED-V3I4P10 |
Authors :Dr.K.Kanthamma, M.V.Sai Ravi Teja, M. Chandra Babu, I.Sainadh, M.V.S.Rahul |
Dr.K.Kanthamma, M.V.Sai Ravi Teja, M. Chandra Babu, I.Sainadh, M.V.S.Rahul "Reversible Implementation of Multiplexer and Demultiplexer Using R-Gates" International Journal of Scientific Research and Engineering Development (IJSRED) Vol3-Issue4 | 68-71.
Abstract :
The paper provides a reversible implementation of multiplexer and de-multiplexer, and evaluation of quantum cost, gate count , garbage outputs and depth of the circuits. The simulation results are obtained in xilinx ise version 14. 2. Reversible good judgment circuits are designed and applied the usage of verilog code. The circuit useful for in addition designing of reversible digital designs with low power loss. The gadgets designed thru this circuit are predicted to have a better overall performance as compared to the present circuits.
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